Part Number Hot Search : 
SG7900A 18160 12852 MC10EP89 04A40 23J250E EGP20D SP006
Product Description
Full Text Search
 

To Download IS61NLF102436A Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
1M x 36 and 2M x 18 36Mb, FLOW THROUGH 'NO WAIT' STATE BUS SRAM
FEATURES
* 100percentbusutilization * NowaitcyclesbetweenReadandWrite * Internalself-timedwritecycle * IndividualByteWriteControl * SingleRead/Writecontrolpin * Clockcontrolled,registeredaddress, data and control
JUNE 2008
DESCRIPTION
The36Meg'NLF/NVF'productfamilyfeaturehigh-speed, low-powersynchronousstaticRAMsdesignedtoprovide aburstable,high-performance,'nowait'state,devicefor networking and communications applications.They are organizedas1Mwordsby36bitsand2Mwordsby18 bits, fabricated with ISSI'sadvancedCMOStechnology. Incorporating a 'no wait' state feature, wait cycles are eliminated when the bus switches from read to write, or writetoread.Thisdeviceintegratesa2-bitburstcounter, high-speedSRAMcore,andhigh-drivecapabilityoutputs into a single monolithic circuit. All synchronous inputs pass through registers are controlled byapositive-edge-triggeredsingleclockinput.Operations may be suspended and all synchronous inputs ignored when Clock Enable, CKEisHIGH.Inthisstatetheinternal device will hold their previous values. AllRead,WriteandDeselectcyclesareinitiatedbytheADV input.WhentheADVisHIGHtheinternalburstcounter isincremented.Newexternaladdressescanbeloaded whenADVisLOW. Write cycles are internally self-timed and are initiated by the rising edge of the clock inputs and when WE is LOW.Separatebyteenablesallowindividualbytestobe written. Aburstmodepin(MODE)definestheorderoftheburst sequence.WhentiedHIGH,theinterleavedburstsequence isselected.WhentiedLOW,thelinearburstsequenceis selected.
* Interleavedorlinearburstsequencecontrolusing MODE input * Threechipenablesforsimpledepthexpansion and address pipelining * PowerDownmode * Commondatainputsanddataoutputs * CKE pin to enable clock and suspend operation * JEDEC100-pinTQFPand165-ballpackages * Powersupply: NVF:Vdd 2.5V(5%),Vddq2.5V(5%) NLF:Vdd3.3V(5%),Vddq3.3V/2.5V(5%) * JTAGBoundaryScanforPBGApackages * Industrialtemperatureavailable * Lead-freeavailable
FAST ACCESS TIME
Symbol tkq tkc Parameter ClockAccessTime CycleTime Frequency 6.5 6.5 7.5 133 7.5 7.5 8.5 117 Units ns ns MHz
Copyright (c) 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
1
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
BLOCK DIAGRAM
x 36: A [0:19] or x 18: A [0:20]
ADDRESS REGISTER
A2-A19 or A2-A20
1Mx36; 2Mx18 MEMORY ARRAY
MODE A0-A1
BURST ADDRESS COUNTER
A'0-A'1
DATA-IN REGISTER
CLK CKE
CONTROL LOGIC
WRITE ADDRESS REGISTER
CE CE2 CE2 ADV WE BWY X OE ZZ DQx/DQPx
}
CONTROL REGISTER
CONTROL LOGIC BUFFER 36 or 18
(X=a-d, or a,b)
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
165-Ball,13mmx15mmBGA
BottomView
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
3
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
PIN CONFIGURATION -- 1M x 36, 165-Ball PBGA (TOP VIEW)
1 A B C D E F G H J K L M N P R NC NC DQPc DQc DQc DQc DQc NC DQd DQd DQd DQd DQPd NC MODE 2 A A NC DQc DQc DQc DQc VDD DQd DQd DQd DQd NC NC A 3 CE CE2 Vddq Vddq Vddq Vddq Vddq NC Vddq Vddq Vddq Vddq Vddq A A 4 BWc BWd Vss Vdd Vdd Vdd Vdd Vdd Vdd Vdd Vdd Vdd Vss A A 5 BWb BWa Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NC TdI TMS 6 CE2 CLK Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NC A1* A0* 7 CKE WE Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NC TDO TCK 8 ADV OE Vss Vdd Vdd Vdd Vdd Vdd Vdd Vdd Vdd Vdd Vss A A 9 A A Vddq Vddq Vddq Vddq Vddq NC Vddq Vddq Vddq Vddq Vddq A A 10 A A NC DQb DQb DQb DQb NC DQa DQa DQa DQa NC A A 11 NC NC DQPb DQb DQb DQb DQb ZZ DQa DQa DQa DQa DQPa NC A
Note:A0andA1arethetwoleastsignificantbits(LSB)oftheaddressfieldandsettheinternalburstcounterifburstisdesired.
PIN DESCRIPTIONS
Symbol A A0,A1 ADV WE CLK CKE CE CE2 CE2 BWx(x=a-d)
PinName Address Inputs SynchronousBurstAddressInputs SynchronousBurstAddressAdvance/ Load SynchronousRead/WriteControl Input SynchronousClock Clock Enable Synchronous Chip Select Synchronous Chip Select Synchronous Chip Select SynchronousByteWriteInputs
Symbol OE ZZ MODE TCK,TDI TDO,TMS VDD NC DQx DQPx VDDQ Vss
PinName Output Enable PowerSleepMode BurstSequenceSelection JTAGPins 3.3V/2.5VPowerSupply NoConnect DataInputs/Outputs ParityDataI/O IsolatedoutputPowerSupply 3.3V/2.5V Ground
4
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
165-PIN PBGA PACKAGE CONFIGURATION
1 2 3 4 5
2M x 18 (TOP VIEW)
6 7 8 9 10 11
A B C D E
F
NC NC NC NC NC NC NC NC DQb DQb DQb DQb DQPb NC MODE
A A NC DQb DQb DQb DQb
CE CE2 VDDQ VDDQ VDDQ VDDQ VDDQ NC VDDQ VDDQ VDDQ VDDQ VDDQ A A
BWb NC Vss VDD VDD VDD VDD VDD VDD VDD VDD VDD Vss A A
NC BWa Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NC TDI TMS
CE2 CLK Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NC A1* A0*
CKE WE Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss NC TDO TCK
ADV OE Vss VDD VDD VDD VDD VDD VDD VDD VDD VDD Vss A A
A A VDDQ VDDQ VDDQ VDDQ VDDQ NC VDDQ VDDQ VDDQ VDDQ VDDQ A A
A A NC NC NC NC NC NC DQa DQa DQa DQa NC A A
A NC DQPa DQa DQa DQa DQa ZZ NC NC NC NC NC NC A
G H
J
VDD
NC NC NC NC NC NC A
K
L
M N P R
Note:A0andA1arethetwoleastsignificantbits(LSB)oftheaddressfieldandsettheinternalburstcounterifburstisdesired.
PIN DESCRIPTIONS
Symbol A A0,A1 ADV WE CLK CKE CE CE2 CE2 BWx(x=a,b) OE ZZ
PinName Address Inputs SynchronousBurstAddressInputs SynchronousBurstAddressAdvance/ Load SynchronousRead/WriteControl Input SynchronousClock Clock Enable Synchronous Chip Select Synchronous Chip Select Synchronous Chip Select SynchronousByteWriteInputs Output Enable PowerSleepMode
MODE TCK,TDI TDO,TMS VDD NC DQx DQPx VDDQ Vss
BurstSequenceSelection JTAGPins 3.3V/2.5VPowerSupply NoConnect DataInputs/Outputs ParityDataI/O IsolatedoutputPowerSupply 3.3V/2.5V Ground
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
5
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
PIN CONFIGURATION
100-Pin TQFP
BWd
BWc BWb
BWa
CKE
ADV A
NC BWb
BWa
CLK WE
CE2
CE2 VDD Vss
CKE
ADV A
CE2
CE2 VDD Vss
CLK WE
OE
CE
OE
NC
CE
A
A
A
A A
A
A
A
DQPc DQc DQc VDDQ Vss DQc DQc DQc DQc Vss VDDQ DQc DQc Vss VDD NC Vss DQd DQd VDDQ Vss DQd DQd DQd DQd Vss VDDQ DQd DQd DQPd
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 1 80 2 79 3 78 4 77 5 76 6 75 7 74 8 73 9 72 10 71 11 70 12 69 13 68 14 67 15 66 16 65 17 64 18 63 19 62 20 61 21 60 22 59 23 58 24 57 25 56 26 55 27 54 28 53 29 52 30 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
MODE Vss A A A A A1 A0 NC NC VDD NC A A A A A A A A
DQPb DQb DQb VDDQ Vss DQb DQb DQb DQb Vss VDDQ DQb DQb Vss NC VDD ZZ DQa DQa VDDQ Vss DQa DQa DQa DQa Vss VDDQ DQa DQa DQPa
NC NC NC VDDQ Vss NC NC DQb DQb Vss VDDQ DQb DQb Vss VDD NC Vss DQb DQb VDDQ Vss DQb DQb DQPb NC Vss VDDQ NC NC NC
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 1 80 2 79 3 78 4 77 5 76 6 75 7 74 8 73 9 72 10 71 11 70 12 69 13 68 14 67 15 66 16 65 17 64 18 63 19 62 20 61 21 60 22 59 23 58 24 57 25 56 26 55 27 54 28 53 29 52 30 51 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
MODE A A A A A1 A0 NC NC Vss VDD NC A A A A A A A A
A A
A NC NC VDDQ Vss NC DQPa DQa DQa Vss VDDQ DQa DQa Vss NC VDD ZZ DQa DQa VDDQ Vss DQa DQa NC NC Vss VDDQ NC NC NC
1M x 36
2M x 18
PIN DESCRIPTIONS
A0,A1
A CLK ADV BWa-BWd WE CKE Vss NC
SynchronousAddressInputs.These pinsmusttiedtothetwoLSBsofthe address bus. Synchronous Address Inputs SynchronousClock SynchronousBurstAddressAdvance SynchronousByteWriteEnable WriteEnable Clock Enable GroundforCore NotConnected
CE, CE2, CE2 OE DQa-DQd DQPa-DQPd MODE Vdd Vss Vddq ZZ
Synchronous Chip Enable Output Enable SynchronousDataInput/Output ParityDataI/O BurstSequenceSelection +3.3V/2.5VPowerSupply GroundforoutputBuffer IsolatedOutputBufferSupply:+3.3V/2.5V SnoozeEnable
6
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
STATE DIAGRAM
READ BEGIN READ WRITE DS READ DS WRITE BEGIN WRITE
READ
WRITE
READ
BURST DS DS
DESELECT BURST DS
BURST
WRITE
BURST
BURST READ
WRITE READ
BURST WRITE
BURST
SYNCHRONOUS TRUTH TABLE(1)
Operation NotSelected NotSelected NotSelected NotSelectedContinue BeginBurstRead ContinueBurstRead NOP/DummyRead DummyRead BeginBurstWrite ContinueBurstWrite NOP/WriteAbort WriteAbort IgnoreClock Notes: Address Used N/A N/A N/A N/A ExternalAddress NextAddress ExternalAddress NextAddress ExternalAddress NextAddress N/A NextAddress CurrentAddress CE H X X X L X L X L X L X X CE2 X L X X H X H X H X H X X CE2 X X H X L X L X L X L X X ADV L L L H L H L H L H L H X WE X X X X H X H X L X L X X BWx X X X X X X X X L L H H X OE X X X X L L H H X X X X X CKE L L L L L L L L L L L L H CLK

1. "X"meansdon'tcare. 2. Therisingedgeofclockissymbolizedby 3. Acontinuedeselectcyclecanonlybeenteredifadeselectcycleisexecutedfirst. 4. WE=LmeansWriteoperationinWriteTruthTable. WE=HmeansReadoperationinWriteTruthTable. 5. Operationfinallydependsonstatusofasynchronouspins(ZZandOE).
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
7
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
ASYNCHRONOUS TRUTH TABLE(1)
Operation SleepMode Read Write Deselected Notes: ZZ H L L L L OE X L H X X I/O STATUS High-Z DQ High-Z Din,High-Z High-Z
1. Xmeans"Don'tCare". 2. Forwritecyclesfollowingreadcycles,theoutputbuffersmustbedisabledwithOE, otherwise data bus contention will occur. 3. SleepModemeanspowerSleepModewherestand-bycurrentdoesnotdependoncycletime. 4. DeselectedmeanspowerSleepModewherestand-bycurrentdependsoncycletime.
WRITE TRUTH TABLE (x18)
Operation READ WRITEBYTEa WRITEBYTEb WRITEALLBYTEs WRITEABORT/NOP Notes: WE H L L L L BWa X L H L H BWb X H L L H
1. Xmeans"Don'tCare". 2. AllinputsinthistablemustbeetsetupandholdtimearoundtherisingedgeofCLK.
WRITE TRUTH TABLE (x36)
Operation READ WRITEBYTEa WRITEBYTEb WRITEBYTEc WRITEBYTEd WRITEALLBYTEs WRITEABORT/NOP Notes: WE H L L L L L L BWa X L H H H L H BWb X H L H H L H BWc X H H L H L H BWd X H H H L L H
1. Xmeans"Don'tCare". 2. AllinputsinthistablemustbeetsetupandholdtimearoundtherisingedgeofCLK.
INTERLEAVED BURST ADDRESS TABLE (MODE=Vdd orNC)
External Address A1 A0 00 01 10 11 1st Burst Address A1 A0 01 00 11 10 2nd Burst Address A1 A0 10 11 00 01 3rd Burst Address A1 A0 11 10 01 00
8
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
LINEAR BURST ADDRESS TABLE (MODE = VSS)
0,0
A1', A0' = 1,1
0,1
1,0
ABSOLUTE MAXIMUM RATINGS(1)
Symbol TsTG Pd IouT VIn, VouT VIn Parameter StorageTemperature PowerDissipation OutputCurrent(perI/O) VoltageRelativetoVssforI/OPins VoltageRelativetoVssfor for Address and Control Inputs Value -65to+150 1.6 100 -0.5toVddq + 0.3 -0.3to4.6 Unit C W mA V V
Notes: 1.StressgreaterthanthoselistedunderABSOLUTEMAXIMUMRATINGSmaycausepermanentdamagetothedevice.Thisisa stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sectionsofthisspecificationisnotimplied.Exposuretoabsolutemaximumratingconditionsforextendedperiodsmayaffectreliability. 2.Thisdevicecontainscircuitytoprotecttheinputsagainstdamageduetohighstaticvoltagesorelectricfields;however,precautionsmaybetakentoavoidapplicationofanyvoltagehigherthanmaximumratedvoltagestothishigh-impedancecircuit. 3.ThisdevicecontainscircuitrythatwillensuretheoutputdevicesareinHigh-Zatpowerup.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
9
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
OPERATING RANGE (IS61NLFx)
Range Commercial Industrial Ambient Temperature 0Cto+70C -40Cto+85C VDD 3.3V5% 3.3V5% VDDq 3.3V/2.5V5% 3.3V/2.5V5%
OPERATING RANGE (IS61NVFx)
Range Commercial Industrial Ambient Temperature 0Cto+70C -40Cto+85C VDD 2.5V5% 2.5V5% VDDq 2.5V5% 2.5V5%
DC ELECTRICAL CHARACTERISTICS (OverOperatingRange)
3.3V Symbol Voh Vol VIh VIl IlI Ilo Parameter OutputHIGHVoltage OutputLOWVoltage InputHIGHVoltage InputLOWVoltage InputLeakageCurrent OutputLeakageCurrent Test Conditions Ioh = -4.0mA (3.3V) Ioh = -1.0mA (2.5V) Iol = 8.0 mA (3.3V) Iol = 1.0 mA (2.5V) Vss VIn Vdd(1) Vss VouT Vddq, OE = VIh Min. 2.4 -- 2.0 -0.3 -5 -5 Max. -- 0.4 Vdd + 0.3 0.8 5 5 Min. 2.0 -- 1.7 -0.3 -5 -5 2.5V Max. -- 0.4 Vdd + 0.3 0.7 5 5 Unit V V V V A A
POWER SUPPLY CHARACTERISTICS(1) (OverOperatingRange)
6.5 MAX x18 400 425 390 200 210 200 210 190 200 7.5 MAX x18 375 400 340 190 200 mA
Symbol Icc Isb
Parameter ACOperating Supply Current Standby Current TTLInput
IsbI
Standby Current cmos Input
Test Conditions Temp. range DeviceSelected, Com. OE = VIh, ZZ VIl, Ind. All Inputs 0.2V or Vdd - 0.2V, typ.(2) CycleTime tkc min. Device Deselected, com. Vdd = Max., Ind. All Inputs VIl or VIh, ZZ VIl, f=Max. Device Deselected, Com. Vdd = Max., Ind. VIn Vss +0.2VorVdd -0.2V f=0 typ(2)
x36 400 425
x36 375 400
Unit mA
100 105 40
100 105
100 105 40
100 105
mA
Note: 1. MODEpinhasaninternalpullupandshouldbetiedtoVddorVss.Itexhibits100Amaximumleakagecurrentwhentiedto Vss+0.2VorVdd-0.2V. 2. TypicalvaluesaremeasuredatVcc =3.3V,TA=25oCandnot100%tested.
10
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
CAPACITANCE(1,2)
Symbol cIn couT Parameter Input Capacitance Input/Output Capacitance Conditions VIn = 0V VouT = 0V Max. 6 8 Unit pF pF
Notes: 1.Testedinitiallyandafteranydesignorprocesschangesthatmayaffecttheseparameters. 2. Testconditions:TA = 25c, f=1MHz,Vdd=3.3V.
3.3V I/O AC TEST CONDITIONS
Parameter InputPulseLevel InputRiseandFallTimes InputandOutputTiming andReferenceLevel OutputLoad Unit 0Vto3.0V 1.5ns 1.5V SeeFigures1and2
3.3V I/O OUTPUT LOAD EQUIVALENT
317
Zo=50
OUTPUT
+3.3V
OUTPUT
50
1.5V
351
5 pF Including jig and scope
Figure 1
Figure 2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
11
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
2.5V I/O AC TEST CONDITIONS
Parameter InputPulseLevel InputRiseandFallTimes InputandOutputTiming andReferenceLevel OutputLoad Unit 0Vto2.5V 1.5ns 1.25V SeeFigures3and4
2.5V I/O OUTPUT LOAD EQUIVALENT
1,667
ZO = 50 OUTPUT
+2.5V
OUTPUT
50
1,538
1.25V
5 pF Including jig and scope
Figure 3
Figure 4
12
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
READ/WRITE CYCLE SWITCHING CHARACTERISTICS(1) (OverOperatingRange)
Symbol fmax tkc tkh tkl tkq tkqx(2) tkqlZ(2,3) tkqhZ(2,3) toeq toelZ(2,3) toehZ(2,3) tAs tws tces tse tAdVs tds tAh the twh tceh tAdVh tdh tPds tPus Notes: Parameter ClockFrequency CycleTime ClockHighTime ClockLowTime ClockAccessTime Clock High to Output Invalid ClockHightoOutputLow-Z ClockHightoOutputHigh-Z OutputEnabletoOutputValid OutputEnabletoOutputLow-Z OutputDisabletoOutputHigh-Z AddressSetupTime Read/WriteSetupTime ChipEnableSetupTime ClockEnableSetupTime AddressAdvanceSetupTime DataSetupTime AddressHoldTime ClockEnableHoldTime WriteHoldTime ChipEnableHoldTime AddressAdvanceHoldTime DataHoldTime ZZHightoPowerDown ZZLowtoPowerDown 6.5 Min. -- 7.5 2.2 2.2 -- 2.5 2.5 -- -- 0 -- 1.5 1.5 1.5 1.5 1.5 1.5 0.65 0.5 0.5 0.5 0.5 0.5 -- -- Max. 133 -- -- -- 6.5 -- -- 3.8 3.2 -- 3.5 -- -- -- -- -- -- -- -- -- -- -- -- 2 2 7.5 Min. Max. -- 117 8.5 -- 2.5 -- 2.5 -- -- 7.5 2.5 -- 2.5 -- -- 4.0 -- 3.4 0 -- -- 3.5 1.5 -- 1.5 -- 1.5 -- 1.5 -- 1.5 -- 1.5 -- 0.65 -- 0.5 -- 0.5 -- 0.5 -- 0.5 -- 0.5 -- -- 2 -- 2 Unit MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns cyc cyc
1. Configuration signal MODE is static and must not change during normal operation. 2. Guaranteedbutnot100%tested.Thisparameterisperiodicallysampled. 3. TestedwithloadinFigure2.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
13
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
SLEEP MODE ELECTRICAL CHARACTERISTICS
Symbol Isb2 tPds tPus tZZI trZZI Parameter CurrentduringSLEEPMODE ZZ active to input ignored ZZ inactive to input sampled ZZactivetoSLEEPcurrent ZZinactivetoexitSLEEPcurrent Conditions ZZVIh Min. Max. 80 2 Unit mA cycle cycle cycle ns

2 2 0
SLEEP MODE TIMING
CLK
tPDS ZZ setup cycle tPUS ZZ recovery cycle
ZZ
tZZI
Isupply
ISB2 tRZZI
All Inputs (exceptZZ)
DeselectorReadOnly
DeselectorReadOnly Normal operation cycle
Outputs (Q)
High-Z Don'tCare
14
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
READ CYCLE TIMING
tKH tKL
CLK
tADVS tADVH
ADV
tKC
tAS tAH
Address A1 A2 A3
tWS tWH
WRITE
tSE tHE
CKE
tCES tCEH
CE
OE
tOEQ tOEHZ
Data Out
Q1-1
tOEHZ
tKQX
Q2-1
tKQ
Q2-2 Q2-3 Q2-4 Q3-1 Q3-2 Q3-3
tKQHZ
Q3-4
NOTES: WRITE = L means WE = L and BWx = L WE = L and BWX = L CE = L means CE1 = L, CE2 = H and CE2 = L CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
Don't Care Undefined
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
15
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
WRITE CYCLE TIMING
tKH tKL
CLK
tKC
ADV
Address
A1
A2
A3
WRITE
tSE tHE
CKE
CE
OE
tDS
Data In
D1-1 D2-1 D2-2 D2-3 D2-4 D3-1 D3-2
tDH
D3-3 D3-4
tOEHZ
Data Out
Q0-4
NOTES: WRITE = L means WE = L and BWx = L WE = L and BWX = L CE = L means CE1 = L, CE2 = H and CE2 = L CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
Don't Care Undefined
16
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
SINGLE READ/WRITE CYCLE TIMING
tKH tKL
CLK
tSE tHE tKC
CKE
Address
A1
A2
A3
A4
A5
A6
A7
A8
A9
WRITE
CE
ADV
OE
tOEQ
Data Out
tOELZ
Q1
tDS tDH
Q3
Q4
Q6
Q7
Data In
D2
NOTES: WRITE = L means WE = L and BWx = L CE = L means CE1 = L, CE2 = H and CE2 = L CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
D5
Don't Care Undefined
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
17
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
CKE OPERATION TIMING
tKH tKL
CLK
tSE tHE tKC
CKE
Address
A1
A2
A3
A4
A5
A6
WRITE
CE
ADV
OE
tKQ tKQHZ
Data Out
tKQLZ
Q1
tDS tDH
Q3
Q4
Data In
D2
NOTES: WRITE=LmeansWE=LandBWx=L CE=LmeansCE1=L,CE2=HandCE2=L CE=HmeansCE1=H,orCE1=LandCE2=H,orCE1=LandCE2=L
D5
Don'tCare Undefined
18
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
CE OPERATION TIMING
tKH tKL
CLK
tSE tHE tKC
CKE
Address
A1
A2
A3
A4
A5
WRITE
CE
ADV
OE
tOEQ tKQHZ tKQ tKQLZ tOELZ
Data Out
Q1
Q2
tDS tDH
Q4
Data In
D3
NOTES: WRITE = L means WE = L and BWx = L CE = L means CE1 = L, CE2 = H and CE2 = L CE = H means CE1 = H, or CE1 = L and CE2 = H, or CE1 = L and CE2 = L
D5
Don't Care Undefined
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
19
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
ORDERING INFORMATION (VDD = 3.3V/VDDq = 2.5V- 3.3V) Commercial Range: 0C to +70C
Access Time 6.5 7.5 6.5 7.5 Order Part Number 1Mx36 IS61NLF102436A-6.5TQ IS61NLF102436A-6.5B3 IS61NLF102436A-7.5TQ IS61NLF102436A-7.5B3 2Mx18 IS61NLF204818A-6.5TQ IS61NLF204818A-6.5B3 IS61NLF204818A-7.5TQ IS61NLF204818A-7.5B3 Package 100TQFP 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA
Industrial Range: -40C to +85C
Access Time 6.5 7.5 6.5 7.5 Order Part Number 1Mx36 IS61NLF102436A-6.5TQI IS61NLF102436A-6.5B3I IS61NLF102436A-7.5TQI IS61NLF102436A-7.5TQLI IS61NLF102436A-7.5B3I 2Mx18 IS61NLF204818A-6.5TQI IS61NLF204818A-6.5B3I IS61NLF204818A-7.5TQI IS61NLF204818A-7.5B3I Package 100TQFP 165PBGA 100TQFP 100TQFP,Lead-free 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA
20
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
IS61NLF102436A/IS61NVF102436A IS61NLF204818A/IS61NVF204818A
ORDERING INFORMATION (VDD = 2.5V /VDDq = 2.5V) Commercial Range: 0C to +70C
Access Time 6.5 7.5 6.5 7.5 Order Part Number 1Mx36 IS61NVF102436A-6.5TQ IS61NVF102436A-6.5B3 IS61NVF102436A-7.5TQ IS61NVF102436A-7.5B3 2Mx18 IS61NVF204818A-6.5TQ IS61NVF204818A-6.5B3 IS61NVF204818A-7.5TQ IS61NVF204818A-7.5B3 Package 100TQFP 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA
Industrial Range: -40C to +85C
Access Time 6.5 7.5 6.5 7.5 Order Part Number 1Mx36 IS61NVF102436A-6.5TQI IS61NVF102436A-6.5B3I IS61NVF102436A-7.5TQI IS61NVF102436A-7.5B3I 2Mx18 IS61NVF204818A-6.5TQI IS61NVF204818A-6.5B3I IS61NVF204818A-7.5TQI IS61NVF204818A-7.5B3I Package 100TQFP 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA 100TQFP 165PBGA
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. B 06/09/08
21
PACKAGING INFORMATION
Ball Grid Array Package Code: B (165-pin)
TOP VIEW
A1 CORNER 1
A B C D E F G H J K L M N P R
b (165X)
BOTTOM VIEW
A1 CORNER 9 8 7 6 5 4 3 2 1
A B C D
2
3
4
5
6
7
8
9
10
11
11 10
e
E F G
D D1
H J K L M N P R
E1 E A2 A1 A
e
BGA - 13mm x 15mm
MILLIMETERS Sym.
N0. Leads A A1 A2 D D1 E E1 e b -- 0.25 -- 14.90 13.90 12.90 9.90 -- 0.40
INCHES Min. Nom. Max.
165
Notes: 1. Controlling dimensions are in millimeters.
Min.
Nom. Max.
165 -- 0.33 0.79 15.00 14.00 13.00 10.00 1.20 0.40 -- 15.10 14.10 13.10 10.10 -- 0.50
-- 0.010 -- 0.587 0.547 0.508 0.390 -- 0.016
-- 0.031 0.591 0.551 0.512 0.394 0.039 0.018
0.047 -- 0.594 0.555 0.516 0.398 -- 0.020
0.013 0.016
1.00
0.45
Copyright (c) 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
Rev. A 06/11/03
PACKAGING INFORMATION
TQFP (Thin Quad Flat Pack Package) Package Code: TQ
D D1
E
E1
N
1
C e SEATING PLANE
L1 L
A2 A1 b
A
Symbol Ref. Std. No. Leads (N) 100 A -- 1.60 -- 0.063 A1 0.05 0.15 0.002 0.006 A2 1.35 1.45 0.053 0.057 b 0.22 0.38 0.009 0.015 D 21.90 22.10 0.862 0.870 D1 19.90 20.10 0.783 0.791 E 15.90 16.10 0.626 0.634 E1 13.90 14.10 0.547 0.555 e 0.65 BSC 0.026 BSC L 0.45 0.75 0.018 0.030 L1 1.00 REF. 0.039 REF. o o C 0 7 0o 7o
Millimeters Min Max
Thin Quad Flat Pack (TQ) Inches Millimeters Min Max Min Max 128 -- 1.60 0.05 0.15 1.35 1.45 0.17 0.27 21.80 22.20 19.90 20.10 15.80 16.20 13.90 14.10 0.50 BSC 0.45 0.75 1.00 REF. 0o 7o
Inches Min Max
-- 0.063 0.002 0.006 0.053 0.057 0.007 0.011 0.858 0.874 0.783 0.791 0.622 0.638 0.547 0.555 0.020 BSC 0.018 0.030 0.039 REF. 0o 7o
Notes: 1. All dimensioning and tolerancing conforms to ANSI Y14.5M-1982. 2. Dimensions D1 and E1 do not include mold protrusions. Allowable protrusion is 0.25 mm per side. D1 and E1 do include mold mismatch and are determined at datum plane -H-. 3. Controlling dimension: millimeters.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
PK13197LQ Rev. D 05/08/03


▲Up To Search▲   

 
Price & Availability of IS61NLF102436A

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X